IC Test Bench Lifecycle

The IC Test Bench is the directory tree containing the test bench for a block or chip.

An IC Test Bench is created in the NotReady state and passes through the lifecycle states listed below. When a test bench is promoted, the Enterprise Project Management application sends a message to the DesignSync server to tag the related object with the state name. You can quickly determine where a test bench is in the design process by looking at its tag.


  • NotReady
  • Ready4Sim